What is DDR4
DDR4 is a new memory standard designed to eventually replace DDR3. While it¡¯s true that when running at the JEDEC specified speeds of 2133MHz and 2400MHz DDR4¡¯s higher latencies may produce slightly lower performance clock-for-clock than DDR3, DDR4 is designed to reliably run at much higher speeds that more than offset the increased latency. In virtually every way, DDR4 is superior to DDR3: it¡¯s capable of being much faster, more efficient, more scalable, and even more reliable. As for cost, much like the transitions to DDR, DDR2, and DDR3, DDR4 will become progressively cheaper as economies of scale take effect. Physically, a DDR4 module, or DIMM, is very similar to a DDR3 DIMM. DDR4 can use a slightly taller printed circuit board and ups the pin count from DDR2 and DDR3¡¯s 240 pins to 288. The key notch (to ensure the DIMM is not improperly installed) is also in a different place, and the overall shape of the connector has a slight "V" contour to aid installation. Architecturally, DDR4 is designed to operate at higher speeds and capacities with lower voltage and adds reliability features not present in DDR3.
Finally, DDR4 operates at a nominal 1.2V and scales up to 1.35V, a reduction in operating power from DDR3¡¯s 1.5V standard and 1.65V mainstream high performance spec. Power efficiency has become increasingly important with each subsequent generation of CPU and GPU architecture from Intel, AMD, and NVIDIA, and DDR4 helps to enable that.
As previously mentioned, the primary benefits of DDR4 are increased bandwidth, a reduction in power consumption, increased density, and improved reliability.
Increased Bandwidth
While DDR3 kits are available all the way up to 3000MHz, JEDEC only specifies operating speeds up to 2133MHz. Scaling beyond that requires exceptionally high performance ICs, making higher speeds harder and harder to obtain. In memory bandwidth bound applications (such as Adobe Media Encoder and Handbrake), 4th Generation Intel Core i5 and i7 processors demonstrate performance scaling all the way up to 2400MHz. This is arguably a limitation of the DDR3 spec, which was never intended to scale this high.
DDR4 is being introduced to the mainstream at 2133MHz and 2400MHz, but the specification allows scaling well beyond that. Launch speeds are as high as 3000MHz, and keep in mind that this is only in the first year. While DDR4 inherits DDR3¡¯s timing methods and will feature another bump in timing latencies similar to the one DDR3 received from DDR2, substantial internal architectural changes and tighter yield specifications allow it to achieve an overall increase in potential bandwidth with room to continue scaling.
While DDR3 kits are available all the way up to 3000MHz, JEDEC only specifies operating speeds up to 2133MHz. Scaling beyond that requires exceptionally high performance ICs, making higher speeds harder and harder to obtain. In memory bandwidth bound applications (such as Adobe Media Encoder and Handbrake), 4th Generation Intel Core i5 and i7 processors demonstrate performance scaling all the way up to 2400MHz. This is arguably a limitation of the DDR3 spec, which was never intended to scale this high.
DDR4 is being introduced to the mainstream at 2133MHz and 2400MHz, but the specification allows scaling well beyond that. Launch speeds are as high as 3000MHz, and keep in mind that this is only in the first year. While DDR4 inherits DDR3¡¯s timing methods and will feature another bump in timing latencies similar to the one DDR3 received from DDR2, substantial internal architectural changes and tighter yield specifications allow it to achieve an overall increase in potential bandwidth with room to continue scaling.
DDR4¡¯s architecture was specified to allow for considerably higher IC and DIMM densities than DDR3¡¯s. Mainstream DDR3 DIMMs currently scale to 8GB, but a modified DDR3 specification (Load Reduction DIMM) allows for an increase to 16GB or 32GB DIMMs. This is unfortunately only visible chiefly on the enterprise side; while AMD¡¯s processors can handle 16GB DIMMs, current generation mainstream Intel processors can¡¯t support individual DDR3 DIMMs larger than 8GB.
The limitations of capacity in DDR3 are addressed from several angles in the DDR4 specification, with each contributing to an overall massive improvement in potential density. First, while a DDR3 IC is specified for up to eight internal banks, DDR4 doubles this number to 16 while also organizing them into four addressable bank groups (improving overall performance and efficiency). DDR4 also increases the potential density of the IC itself, all the way up to 16Gb.
One benefit of DDR4 not often mentioned but worth discussing is the overall improved reliability and stability. While reliability and stability are appreciated on the consumer side of the market, they¡¯re vital on the enterprise side. The additions to the DDR4 specification that address this benefit everyone. First, DDR4 implements a CRC, or cyclic redundancy check. As operating frequencies scale, the potential for write errors to memory increases. Employing the CRC allows for real-time write error detection and can correct intermittent errors, as well as enabling more robust error reporting to the system itself. Command and address parity error detection and recovery have also been added to DDR4, and changes to the DDR4 register allow it to block commands upon detection of a parity error. While DDR3 would pass those commands on to the DRAM itself, DDR4 essentially stops them at the gate.
Operating temperature is a well known inhibitor with most computing technologies, as high temperatures can reduce signal clarity and produce errors. DDR4¡¯s thermals can be monitored and its timings adjusted to account for changes in temperature, though this is only expected to be implemented in SODIMMs where heat becomes a more serious issue.
Conclusion
Much like each memory technology transition that preceded it, DDR4¡¯s value upon introduction may seem nebulous compared to the incumbent DDR3. DDR2 operating at the same frequency as mainstream DDR was slightly slower, DDR3 had the same issue with DDR2, and DDR4 will have the same issue with DDR3. This is expected; each transition meant slightly looser timings. Yet each time, the newer specification was implemented less to improve the present and more to meet the needs of the future. DDR4 is no exception. Where DDR4 does deviate substantially from its predecessors is in how dramatic the changes in specification and architecture are. Each iteration of DDR memory brought with it the same three improvements: increased speed, increased density, and reduced power. The differences in scale, however, are massive, and DDR4 in particular is the most spectacular leap yet.
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Why Do We Need DDR4?
When DDR4 is introduced, the initial 2133MHz and 2400MHz speeds will be accompanied by another increase in latency, just as each previous memory technology transition has been. These speeds are essentially the top of the ladder for DDR3, though; while DDR3 kits can be obtained at speeds as high as 3200MHz, ICs capable of performing at those levels are extremely rare. Meanwhile, DDR4 is expected to scale well beyond 3200MHz. What DDR4 offers is scalability for the future: individual DIMM densities start at 4GB and 8GB and are expected to scale to 16GB in 2015. Bandwidth is also capable of scaling uptremendously. 2666MHz DDR3 isn¡¯t especially common right now; it operates outside of JEDEC spec and requires carefully selected ICs, yet already situations exist that demonstrate a need for increased bandwidth beyond that speed. DDR4 comes out of the gate at 2400MHz, with 2666MHz, 2800MHz, and 3000MHz SKUs already planned.Finally, DDR4 operates at a nominal 1.2V and scales up to 1.35V, a reduction in operating power from DDR3¡¯s 1.5V standard and 1.65V mainstream high performance spec. Power efficiency has become increasingly important with each subsequent generation of CPU and GPU architecture from Intel, AMD, and NVIDIA, and DDR4 helps to enable that.
DDR4 in Detail
As previously mentioned, the primary benefits of DDR4 are increased bandwidth, a reduction in power consumption, increased density, and improved reliability.Increased Bandwidth
While DDR3 kits are available all the way up to 3000MHz, JEDEC only specifies operating speeds up to 2133MHz. Scaling beyond that requires exceptionally high performance ICs, making higher speeds harder and harder to obtain. In memory bandwidth bound applications (such as Adobe Media Encoder and Handbrake), 4th Generation Intel Core i5 and i7 processors demonstrate performance scaling all the way up to 2400MHz. This is arguably a limitation of the DDR3 spec, which was never intended to scale this high.
DDR4 is being introduced to the mainstream at 2133MHz and 2400MHz, but the specification allows scaling well beyond that. Launch speeds are as high as 3000MHz, and keep in mind that this is only in the first year. While DDR4 inherits DDR3¡¯s timing methods and will feature another bump in timing latencies similar to the one DDR3 received from DDR2, substantial internal architectural changes and tighter yield specifications allow it to achieve an overall increase in potential bandwidth with room to continue scaling.
Increased Bandwidth
While DDR3 kits are available all the way up to 3000MHz, JEDEC only specifies operating speeds up to 2133MHz. Scaling beyond that requires exceptionally high performance ICs, making higher speeds harder and harder to obtain. In memory bandwidth bound applications (such as Adobe Media Encoder and Handbrake), 4th Generation Intel Core i5 and i7 processors demonstrate performance scaling all the way up to 2400MHz. This is arguably a limitation of the DDR3 spec, which was never intended to scale this high.DDR4 is being introduced to the mainstream at 2133MHz and 2400MHz, but the specification allows scaling well beyond that. Launch speeds are as high as 3000MHz, and keep in mind that this is only in the first year. While DDR4 inherits DDR3¡¯s timing methods and will feature another bump in timing latencies similar to the one DDR3 received from DDR2, substantial internal architectural changes and tighter yield specifications allow it to achieve an overall increase in potential bandwidth with room to continue scaling.
Increased Density
DDR4¡¯s architecture was specified to allow for considerably higher IC and DIMM densities than DDR3¡¯s. Mainstream DDR3 DIMMs currently scale to 8GB, but a modified DDR3 specification (Load Reduction DIMM) allows for an increase to 16GB or 32GB DIMMs. This is unfortunately only visible chiefly on the enterprise side; while AMD¡¯s processors can handle 16GB DIMMs, current generation mainstream Intel processors can¡¯t support individual DDR3 DIMMs larger than 8GB. 
The limitations of capacity in DDR3 are addressed from several angles in the DDR4 specification, with each contributing to an overall massive improvement in potential density. First, while a DDR3 IC is specified for up to eight internal banks, DDR4 doubles this number to 16 while also organizing them into four addressable bank groups (improving overall performance and efficiency). DDR4 also increases the potential density of the IC itself, all the way up to 16Gb.Improved Reliability
One benefit of DDR4 not often mentioned but worth discussing is the overall improved reliability and stability. While reliability and stability are appreciated on the consumer side of the market, they¡¯re vital on the enterprise side. The additions to the DDR4 specification that address this benefit everyone. First, DDR4 implements a CRC, or cyclic redundancy check. As operating frequencies scale, the potential for write errors to memory increases. Employing the CRC allows for real-time write error detection and can correct intermittent errors, as well as enabling more robust error reporting to the system itself. Command and address parity error detection and recovery have also been added to DDR4, and changes to the DDR4 register allow it to block commands upon detection of a parity error. While DDR3 would pass those commands on to the DRAM itself, DDR4 essentially stops them at the gate.
Operating temperature is a well known inhibitor with most computing technologies, as high temperatures can reduce signal clarity and produce errors. DDR4¡¯s thermals can be monitored and its timings adjusted to account for changes in temperature, though this is only expected to be implemented in SODIMMs where heat becomes a more serious issue.
Conclusion
Much like each memory technology transition that preceded it, DDR4¡¯s value upon introduction may seem nebulous compared to the incumbent DDR3. DDR2 operating at the same frequency as mainstream DDR was slightly slower, DDR3 had the same issue with DDR2, and DDR4 will have the same issue with DDR3. This is expected; each transition meant slightly looser timings. Yet each time, the newer specification was implemented less to improve the present and more to meet the needs of the future. DDR4 is no exception. Where DDR4 does deviate substantially from its predecessors is in how dramatic the changes in specification and architecture are. Each iteration of DDR memory brought with it the same three improvements: increased speed, increased density, and reduced power. The differences in scale, however, are massive, and DDR4 in particular is the most spectacular leap yet.
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